Wildcard Targets in a Makefile (Pattern Rules)

You may use "Wildcard" targets in GNU makefile. In GNU make, this is called Pattern Rules. I find this post is very helpful.  For those who do not  have the patience to read the documentation of GNU Make or to jump to the post, here is a few examples that serves as a summary.

To apply a rule to compile any C++ files, we can write a rule as follows,

CPP=g++
CLFAGS=-Wall

%.o:%.cpp
       $(CPP) $(CFLAGS) $< -o $@

To apply to rule to convert any LaTeX files to dvi files, any dvi files to PostScript files, and then any PostScript files to PDF files, we may write a set of rules as follows,

%.pdf: %.ps
 ps2pdf \
              -dPDFSETTINGS=/prepress \
              -dSubsetFonts=true \
              -dEmbedAllFonts=true \
              -dMaxSubsetPct=100 \
              -dCompatibilityLevel=1.4 $<

%.ps: %.dvi
       dvips -t letter $<

 
%.dvi: %.tex
       latex $<